Low Tech Serial Input with 6502

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Let's extend the serial transmit circuit by adding a receive circuit, so we can also receive data from the PC!

00:00 Intro
02:04 Design overview
07:11 Detailed tour of schematic
20:30 Schematic errata
23:41 Writing test code
32:19 Code errata
33:34 Practical test
36:26 Outro
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Two videos in as many days!? This is great, your descriptions are really very helpful in understanding this stuff.

GregCoonrod
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Glad you’re back, George. Thanks for the interesting build.

brettb.
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Hey bud. Totally keen to see your design files. I've been feverishly hammering away at my breadboard to get some ram / ROM banking going.
Your little PCB stack looks great!

DavidLatham-productiondave
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Very informative video thanks. I’m amazed that you achieved such high clock speeds on breadboards! As per James Sharman’s previous comment, I too would like to learn more about how you managed switching between clock speeds when accessing either RAM or ROM. I look forward to your next video 👍

michaelboyd
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Back with a vengeance I see :D
Btw: That serial is more capable than some dedicated uart implementations :)

Chriva
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Clever implementation! :) Your FTDI bugger usually spits out whatever is in its RX buffer when you connect to the serial port so the junk data could've come at any point in time.
It looks like it's almost ready to get it's own PCB.
Since I'm doing software serial on the 65uino I'm feeling a bit envious - with this you should be able to use it full duplex, even without additional buffering. If you send it a continuous stream of characters it would have plenty of time to echo rx to tx on the fly, right?

AndersNielsenAA
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Two questions: How much more complexity would be added to support hardware selectable baud rates? What do you see as the limitations in a discrete logic approach to this problem, as in, what features or capabilities are you giving up by not going with an off the shelf UART IC?

GregCoonrod
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You are using a lot of 7474, do you think it worths to re-think the design and use one 74175 kind instead?

alexloktionoff
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Using read to clear IRQ is a pitfall. With high-speed FrontSideBus as you have on CPU card, posted writes /* CPU fires write to I/O and runs further, so only I/O interface becomes blocked */ are much cheaper then a single read operation which slows down FSB to synchronize with I/O bus.

alexloktionoff
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I wonder how truly dense a uart circuit can be using 7400 series

luz_reyes_
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Unfortunately during the video my brain kept yelling, "Just use a 6850!" over and over. 😒

scottlarson
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