Stanford Seminar - Centaur Technology's Deep learning Coprocessor

Glenn Henry
Centaur Technology

February 12, 2020
This talk will explore Centaur's microprocessor-design technology includes both a new high-performance x86 core AND the industry's FIRST integrated AI Coprocessor for x86 systems. The x86 microprocessor cores deliver high instructions/clock (IPC) for server-class applications and support the latest x86 extensions such as AVX 512 and new instructions for fast transfer of AI data. The AI Coprocessor is a clean-sheet processor designed to deliver high performance and efficiency on deep-learning applications, freeing up the x86 cores for general-purpose computing. Both the x86 and AI Coprocessor technologies have now been proven in silicon using a new scalable SoC platform with eight x86 cores and an AI Coprocessor able to compute 20 trillion AI operations/sec with 20 terabytes/sec memory bandwidth. This SoC architecture requires less than 195mm2 in TSMC 16nm and provides an extensible platform with 44 PCIe lanes and 4 channels of PC3200 DDR4.