Debug and Verify FPGA Algorithms with MATLAB and Simulink -- MathWorks

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Today’s FPGA designs require industrial-strength functional verification. The ad-hoc methods that worked with older, smaller FPGAs just don’t cut it anymore. In this episode of Chalk Talk, Amelia Dalton chats with Eric Cigan of MathWorks about ASIC-strength functional verification with model-based design.

  1. EE Journal
  2. MathWorks
  3. Amelia Dalton
  4. EE Journal
  5. Electronic Engineering Journal
  6. ASIC
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