SAN19-417 Performance Engineering for Arm Supercomputers

Arm and its partners are rapidly gaining ground in high performance computing with supercomputers based on Arm’s server-class IP (a.k.a. Neoverse) in production at leadership computing facilities worldwide. An unprecedented number of open source and commercial HPC software developers are actively tuning their applications for these new platforms. This presentation expands on the “Arm in HPC” keynote to encourage growth and collaboration in the Arm HPC community by introducing the available technologies, methodologies, and resources for HPC developers interested in migrating their applications to Arm Neoverse. The first 25 minutes of this presentation will review of the state-of-the-art in supercomputer deployments and software applications, introduce HPC developer tools from Arm and the HPC community, and conclude with tips and tricks for porting high performance computing applications to Neoverse supercomputers. If 50 minutes are available for this presentation, we will also include tips and tricks for porting vectorized HPC applications to Arm’s Scalable Vector Extension (SVE) and introduce a performance quantification methodology for SVE based on the Arm Instruction Emulator (ArmIE). We will demonstrate how highly tuned HPC applications can be ported to SVE when those applications have made assumptions about the hardware vector width and discuss the performance implications of vector width agnostic (VLA) programming. The presentation will conclude by presenting community resources for HPC developers and extending an invitation to future community events.