Explain instruction cycle, machine cycle and T-states | CSITAN

Explain instruction cycle, machine cycle and T-states. Draw the timing diagram of IN instructions

The instruction cycle (also known as the fetch-decode-execute cycle, or simply the fetch-execute cycle) is the cycle that the central processing unit (CPU) follows from boot-up until the computer has shut down in order to process instructions.
A program residing in the memory unit of a computer consists of a sequence of instructions. These instructions are executed by the processor by going through a cycle for each instruction. In a basic computer, each instruction cycle consists of the following phases:
1. Fetch instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.
Fetch cycle: The next instruction is fetched by the address stored in program counter (PC) and then stored in the instruction register.
Decode instruction: Decoder interprets the encoded instruction from instruction register.
Reading effective address: The address given in instruction is read from main memory and required data is fetched. The effective address depends on direct addressing mode or indirect addressing mode.
Execution cycle: consists memory read (MR), memory write (MW), input output read (IOR) and input output write (IOW)

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