03: ARM Cortex-M Load/Store Instructions

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Introduces the Load and Store instructions for the ARM Cortex-M microcontrollers, as well as the special case of the "literal" addressing mode.

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Many of these videos about ARM are so abstract that they are useless. Your videos are very good and to the point. Thank you for your work.

Tapajara

The fact that this level of content is available for free on the internet is astonishing.

johanneswestman

Ladies and Gentlemen I feel like i owe Joe The Professor for this job. This is pure gold

phoraramotale

I’m guessing that your videos are about to get a whole lot more popular.

diegeeleel

You are a lifesaver Professor Joe <3

ulassbingol

You are the hero we needed <3 there is hope for my class now!

jasonhunter

Thank you for these videos, are well explained.

mathemabeat

Tommy Tutone is now stuck in my head, thank you.

Jordan-ibfr

Great videos, very helpful in understanding basic assembly coding.

AthosUnsurtrois

Due to pipelining, the PC should be pointing on the next line in the drawing...at least that's how it is on ARM9. I believe it's the same on the Cortex. Can easily be proved by checking the listing and see what offset the assembler puts.

mvisperas

thank you sir for very smooth explanation

kindjupiter

excellent videos, thanks a lot and congrats

gabrielsoloman

Thanks a ton "JoeTheProfessor" for posting this video. The whole thing about Literal Pool was driving me crazy. Your video has simplified it. I have one more question on "The Cortex-M0 processor supporting immediate offset addressing modes". It is denoted as:
LDR <Rt>, [<Rn>, #immed5] ; Word read
Does "#immed5" mean that the "Offset" can only be 5 bits long(32 bytes). If "yes", does this restriction again come due to limited size of the instruction??

viveksharma

Why the address increases by 4? Does it means every memory segment have 4 bytes(8bit hexadecimal number or 32bit binary number) of data? So is the address means how many bytes?

唐要离

LDR R0, =JENNY ; this will load the memory address of the JENNY constant in the R0.
LDR R1, [R0] ; this will load the value from the memory address where JENNY constant is present into R1

// What is shown in literal addressing (10:40) will store the address of the count in the R0, not the content (0x00845FED) as shown.

tapasxploreindia

In the section on Literal Pooling, we don't finally use the Jenny label to reference the constant stored in 'another' file, but we use the PC and declare the 32-bit constant at the end of the subroutine, in the same file, as the LDR instruction needs a register to provide a source memory address. Is it thus not possible to use the method that dealt with the Jenny label with the LDR command?

adityakapoor

So does it mean for let's say r0 which contains can be either a memory or an address?

piglink

One question.we can use immediate addressing and relative addressing on instructions load /store?

johnniewalkerjohnniewalker

If a full 32-bit address cannot be used in an instruction, couldn't the same be said about registers? Because, you know, that pointer value must have gotten to that register in some way, and it is a 32-bit value either way, right?

bonbonpony

Actually sir..u got quite good no. of followers.. why don't u do more of these

wafflyy

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