Functional Debug: Verification and Beyond

Presented at DVCon U.S. 2021

In this workshop, we explore an alternative approach to SoC development, analysis, debug and bring up. We describe a different approach, in which debug and performance tuning is considered from the outset, by including within the SoC a light but independent infrastructure dedicated to bringing debug visibility across the entire SoC – an approach which is independent of CPU architecture. We outline a methodology which includes local intelligence inside the SoC to select and communicate off-chip only those monitoring data which are significant and meaningful. In this workshop, we further discuss the features of functional debug solutions and the benefits they bring throughout the SoC development process.

By: Hanan Moller, Siemens EDA