L-4.3: Pipelining Vs Non-Pipelining | Instruction Execution | Speedup, Efficiency, Utilization | COA

In this Video you will see difference between Instruction execution in pipelined and non pipelined architecture. Video explain formulas related to speedup., efficiency and utilization in 5 stage-pipelined architecture.
In pipelining system, multiple instructions are overlapped during execution. In a Non-Pipelining system, processes like decoding, fetching, execution and writing memory are merged into a single unit or a single step. Many instructions are executed at the same time. Only one instruction is executed at the same time.

0:00 - Introduction
1:32 - Non-Pipelining
2:07 - Pipelining
8:42 - CPI
10:33 - Speedup
11:17 - Efficiency

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[nishadhshah]

Just a little improvement, if each instruction takes t sec(or clock cycle) for clearing each stage then general formula would be,
= t*(k+N-1)

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